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It would be rather a shame to not use the Fanuc encoders as they are 65536 or even 131072 count/turn encoders (I believe they also have absolute data in the serial stream)

PCW wrote:
Do you need a Hostmot2 SSI interface?

Fanuc is not SSI AFAIK

Theres HM2 firmware for SSI and BISS but I have been too cheap to buy a
encoder to test these. The SSI interface should be OK its just a 32 bit version of
16 bit SSI interface we wrote for a customer (who loaned us a very expensive encoder)
For a working Fanuc encoder interface I would probably need a Fanuc encoder to play with

andypugh wrote:OK, that sounds quite interesting. You'd have to move the motor up to one
full turn to reach the index position, then the encoder count would jump by how
far you'd moved it when the encoder sees the index position.Yes, you could put on a Renco or Avago 6-channel encoder, although it would take a bit of hacking.
The Fanuc motors have a proprietary Oldham-like coupling between motor and encoder.
You might be able to adapt a kit encoder to the shaft after removing the coupling part.
Then, you'd have to phase the encoder to the motor poles. The advantage of the Fanuc
encoders is they are VERY high resolution, 32K, 64K, 128K and 1024K counts/rev!
And, the only way to do that is to send a pseudo-absolute position value when requested,
the quadrature rates would become insane.

Jon

PCW wrote:Only the (alpha)A(resolution) encoders have the absolute data. The (alpha)I(resolution)
models do not give that data.

(alpha) means the Greek lower-case alpha symbol.
(resolution) means 32, 64, 128 or (i think) 1024
to mean 32K, 64K 128K or 1024K counts/rev.

Jon

PCW wrote:The data rate is 1.024 MBits/second, and you get a 77-bit asynchronous stream of bits with no
clock after the start bit. So, the clock rate has to be pretty well-matched to stay in sync.

Jon

jmelson wrote:
it's not actually that complicated. The point is that all that matters for commutation is the motor magnetic positon. bldc simply takes the position with A at +V and B,C at -V as commutation angle zero (it's as good a choice as any). All the commutation inputs and outputs use this same convention internally, and it doesn't actually matter if this doesn't match the motor or drive assumptions because it all eventually cancels out.

The magnetic alignment process just wiggles the phases clockwise and anticlockwise, converging on the A+ B- C- position (an attempt to shake stiction free)

There are far cleverer ways to do it based on back-emf etc, and sensorless drives do exactly that, but AFAIK there is no way to get that data in to HAL, so it can't be used.

if anyone comes up with a scheme, I am happy to integrate it into bldc. ditto for any encoder schemes, I have already included the Fanuc 16 position commutation as both input and output modes, so for example you can (badly) translate Fanuc Gray code into Hall signals for a non-Fanuc drive. it's not a good solution, as 6 into 16 doesn't go, but it is enough to spin a motor until an index is seen and the component can start commutating sinusoidally.

Wow

You guys are currently way over my head. I need to do some major research.

The one servo motor is a model 5 part number A06b-0512-b031 and is marked "pulse coder". The drives are setup with a 6 volt battery so I would assume they are have an absolute encoder. I could really care less if the the absolute part works as homing is no big deal.

I haven't been able to find out if the encoders on the servos are compatible with 6050 drives. That will be the simplest option but I'm not against working outside the box.

Cory

"The data rate is 1.024 MBits/second, and you get a 77-bit asynchronous stream of bits with no clock after the start bit. So, the clock rate has to be pretty well-matched to stay in sync.

Jon"

This sounds like our normal UART with the data length extended to 77 bits would work.
This UART uses a DDS started synchronously by the start bit to generate the sample clock.
This scheme has the advantage that it allows high resolution setting of high baud rates (rather than the more normal programmable divider baud rate generator that has high resolution settability only at low baud rates)

Currently this uses a 20 bit DDS so at 50 MHz and with some back of a napkin calculations, I get less then 5 % of bit cell timing error max at the last bit.

Its a bit obnoxious that it takes ~77 usec to get the data however.

PCW wrote:Yes, well, that is the downside of serial encoders. The count rate can be insane, but you get large
latencies. So, the data as you receive it is where the machine was 77 us ago, and the position
updates occur every ~100 us, so timestamping to get better velocity estimates doesn't work as well.
Other than that, it is a solution to the problem of how to read position at high resolution
without excessive quadrature frequencies.

Jon